الفهرس 
INTRODUCTIONOnly 14 pages are availabe for public view
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Abstract
This dissertation demonstrates the design of a fully integrated 2.4 GHz
CMOS receiver in accordance with the Zig8ee standard. The receiver
integrates a low noise amplifier, a pair of passive mixers, a pair of
variable gain low-pass filters.
The dissertation also includes detailed system design and simulation
of the proposed receiver. Three main targets have been addressed through
the whole thesis in order for the receiver to be suitable for the target
application, wireless sensor networks. These targets are low cost, small
area and low power consumption. These targets have been addressed in
two aspects; system level and circuit level.
UMC O.13llm CMOS technology was used in the design. Simulation
results show that the receiver front-end has a 60dB voltage conversion
gain, an 8.5dB noise figure and can tolerate a signal higher than -20dBm
at its input. It consumes 6mA from a 1.2 V supply.
Key words: direct-conversion receiver, low noise amplifier, low power,
passive mixer, system design, variable gain filter, ZigBee.