الفهرس 
SystemC Modeling MethodologyOnly 14 pages are availabe for public view
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Abstract
With FDA industry moving to integrating microprocessors, memory and A\SICs into a single chip to form System on Clip (SoC). Detailed system specification that closely simulates the target system l)ecomes a necessity to detect system bugs at early stages of development and hardware/software co-verification becomes the enabler to merge between the software and hardware of the -,N,stcm design.
In this thesis, we focus on using SystemC, a new modeling methodology based on C++, to describe both hardware and software of an entire system throughout the design flow.
Using this methodology, we model a hri<,ritv-based preemptive real incti operating system (R l’OS) kernel. ’1’hen, we develop a co-vcrifcaticcn technkjL:c, to verify the interaction of the cnll)cd(led software consisting of the R’I’OS kernel and the tunniltg application tasks with a hardware module representing a bus functional model (IWAI) of a generic microcontroller with its associated hardware peripherals.
For this thesis, we show that using SystemC to model all parts of the system provides great flexibility and enables faster co-simulation compared to existing metli )dolOgics.