الفهرس 
IntroductionOnly 14 pages are availabe for public view
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Abstract
The thesis is divided into six chapters as listed below:
Chapter 1
In this chapter, the motivation for this work is presented, as well as a high-level overview on memristors and SRAMs. This is later followed by the thesis outline.
Chapter 2
In this chapter, the operation of a memristor device is discussed in details
Chapter 3
This chapter focuses on modeling a memristor device. Several models such as the linear, non- linear and exponential models are presented, and compared using simulations.
Chapter 4
Chapter 4 gives an overview on 6T SRAM Module
Chapter 5
This chapter focuses on the design and analysis of a single bit memristor-based RRAM cell. The cell write operation, single read and repeated read modes are analyzed in details. This 1T2M memristor cell is then used to design a complete on-chip RRAM macro. Implementation details and simulation results are shown and compared to conventional 6T SRAM macros, as well as to other memristor based memory implementations previously proposed in the literature.
Chapter 6
In this chapter, we upgrade the cell used in the past chapter to be able to store multiple bits. A complete RRAM macro is designed to support multiple-bit storage per cell. Implementation details and simulation results are shown to compare it to the memristor-based RRAM proposed in the previous chapter.
Chapter 7
This chapter concludes the thesis and presents any planned future work.