Search In this Thesis
   Search In this Thesis  
العنوان
Design and implementation of building blocks in LTE-advanced \
المؤلف
Ali, Sara Mohammed Hassan.
هيئة الاعداد
باحث / سارة محمد حسن على
مشرف / عبد الحليم عبد النبى ذكري
مشرف / محمد السعيد عبد العليم بيومى
مشرف / ريم أبراهيم سيد
تاريخ النشر
2017.
عدد الصفحات
138 p. :
اللغة
الإنجليزية
الدرجة
ماجستير
التخصص
الهندسة الكهربائية والالكترونية
تاريخ الإجازة
1/1/2017
مكان الإجازة
جامعة عين شمس - كلية الهندسة - هندسة الالكترونيات والاتصالات الكهربية
الفهرس
Only 14 pages are availabe for public view

from 138

from 138

Abstract

In today’s information society, there is a growing need to access data communication services ubiquitously, with mobility and increasingly higher data rates. This society’s demand together with the interests of operators, manufacturers and standardization bodies has motivated the development of the fourth generation of mobile communications (4G). This development has required a revolution on the radio interface of the mobile communications systems, and, consequently, has significantly modified their capabilities and their radio resource management. The demand of mobile users with high data-rate services continues to increase. To satisfy the needs of such mobile users, operators must continue to enhance their existing networks. This is the case of the technology known as Long Term Evolution (LTE) and its 4G version called LTE-Advanced.
The continued increase in the number of users of mobile communications all over the world, motivated researchers to search for a unified wireless platform. This will enable the mobile users to conduct business and exchange data easily while moving elsewhere in the world. The new features of LTE-Advanced made it the promising platform intended for the advancements in mobile communications.
LTE-Advanced started with The Third Generation Partnership Project (3GPP) Release 10 can provide up to 1 Gbps as peak data rates in downlink. Also LTE-Advanced Release 10 provides higher throughput, higher coverage, and lower latencies. The LTE-Advanced Physical layer (PHY) is a highly efficient means of conveying both data and control information between an enhanced base station (eNodeB) and the mobile User Equipment (UE). To achieve a higher bit data rates up to 1 Gbps for meeting the growing needs of the users of the mobile communication system, new features are added by the LTE-Advanced PHY, a direct consequence of applying new modulation and coding techniques for both the Uplink and Downlink. The Orthogonal Frequency Division Multiple Access (OFDMA) is applied for the Downlink and the Single Carrier Frequency Division Multiple Access (SC-FDMA) is used for the Uplink as well as turbo coding.
LTE-Advanced support the Carrier Aggregation (CA) techniques that act as a solution to bandwidth extension for large transmission bandwidths from 40 MHz to 100MHz and high peak data rate of 500 Mbps in the uplink and 1Gbps in the downlink. Also, LTE-Advanced supports the Multipoint Transmission and Reception as Multi Input Multi Output (MIMO) that ensures more system throughput.
In this thesis, experience is gained in building the advanced wireless mobile communication standards, by introducing the performance evaluation of the LTE-Advanced downlink PHY with OFDMA according to 3GPP Release 10 specifications. The thesis presents the design, simulation and implementation of the LTE-Advanced downlink PHY transmitter and receiver according to release 10. All stages of the LTE-Advanced downlink PHY transceiver, together with the time and frequency synchronization in the receiver, are modeled, simulated, and implemented. The physical layer contains also an Intra-band contiguous Carrier Aggregation with two Component Carriers (CCs) with 2x2 MIMO building blocks. The modeling and simulation is done by using the MATLAB version R2014a, and the implementation is done using Field-programmable gate array (FPGA) on Virtex 6 XC6VLX240T FPGA kit using Xilinx package version 13.3. The simulation and implementation of every stage in both transmitter and receiver are tested and verified. It is found that the whole LTE-Advanced downlink physical layer consumes a small fraction of the all FPGA logic blocks. Moreover, the application of the CA scenario and the 2x2 MIMO technique increase the system data rate and its throughput. The thesis introduces all building blocks of the LTE-Advanced downlink PHY layer transceiver as well as its time and frequency synchronization. It contains also simulation, and implementation of each block as well as their functional testing and verification. Moreover the whole system is assembled and tested.
Chapter one presented an introduction to LTE-Advanced standards, it contains a survey on the previous research work concerning the design and implementation of the system. The technology of Software Defined Radio (SDR) is discussed with its benefits. FPGA is introduced as a platform to implement the physical layer with its internal Structure and design flow steps.
Chapter two presents the theoretical part for the LTE-Advanced Downlink PHY layer techniques and the equations of the transceiver building blocks as well as the system synchronization techniques. The performance of each stage is discussed and improved. The chapter describes also the generic frame structure and Physical Resource Block specifications for the LTE-Advanced Downlink PHY layer. The system channel coding techniques and its modulation parameters are discussed. Finally MIMO operation and the CA scenarios with their theory are discussed.
Chapter three introduces the MATLAB simulation of the LTE-Advanced Downlink PHY transmitter and receiver building blocks including the time and frequency synchronization. The functionality testing to each transceiver block and the whole system verification are discussed and improved. The CA simulation is carried out to increase the system data rates. The system performance is determined while using Adaptive White Gaussian Noise (AWGN) channel effect, where the bit error rate is calculated as a function of the energy per bit to noise density ratio Eb/No. The system simulation was done by using the MATLAB codes version R2014a.
Chapter four presents the VHDL design and implementation of the LTE-Advanced Downlink PHY transceiver building blocks, with its timing and frequency synchronization. Each block is tested and verified by using a loopback test. The verification is done by entering a specific data stream to the transmitter input and receiving the same data stream at the receiver output. By this way, the whole system verification was done. The system channel effect is modeled by applying a delay on the transmitted data. The MIMO (2x2) and intra-band contiguous CA techniques are also designed and implemented to increase the system data rates. The system area utilization tables on the FPGA are obtained and discussed. The area reduction strategy is applied to reduce the number of utilized FPGA resources. The time performance strategy is presented to improve the processing speed. Also, power optimization strategy is carried out for minimizing the system power. The whole system is designed and tested by using the VHDL codes for Xilinx package version 13.3. Finally, the experimental implementation is described by downloading the system executable file on FPGA Virtex 6 XC6VLX240T.
Chapter five introduced the thesis conclusions and the recommendations that should be implemented in the future as ongoing work with this study.
Key words: LTE, 4G, 3GPP, OFDMA, LTE-advanced downlink physical layer, release 10, MATLAB R2014a, Xilinx Design Suite, virtex 6 XC6VLX240T, FPGA.