الفهرس يوجد فقط 14 صفحة متاحة للعرض العام
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المستخلص
Scaling down of MOS devices continuously achieves faster circuit speed, smaller area, and lower power dissipation. Multi - gate MOSFET is emerging as a very promising candidate for next generation ICs as it overcomes several limitations of the classical MOSFET at the deep submicron technology nodes. Therefore, the multi - gate MOSFET is currently a subject of intense scientific research. This thesis aims at enhancing and improving the compact model of the double - gate MOSFET. A review of the compact models developed previously for this MOSFET is given including the models by taur (2004), Hu (2004), AboElhadeed (2010) and garduno (2011). Additionally, we simulate numerically the double - gate MOSFET using the ATLAS device simulator. The results of this numerical device simulation are used as a reference to validate the accuracy of the aforementioned compact models. Next, we modified AboElhadeed{u2019}s model to include the effects of the source / drain series resistances, and the gate tunneling current. These effects improved the behavior of basic model of AboElhadeed and enabled us to bring down the fitting error from 25% for Hu{u2019}s model and 19% for the original AboElhadeed{u2019}s model to 5% only