الفهرس 
IntroductionOnly 14 pages are availabe for public view
 |  | from | 208 |  |  |
| | | from | 208 | | |
Abstract
In this thesis, a new class of nanometer scale transistors was
investigated. In these transistors, the field generated by an applied gate
bias modulates the transmission probability through a tunnel barrier
between the drain and the source. We treated two types of transistors;
namely single- and dual-gate transistors. The characteristics of such
transistors were studied using a computer simulation. A 2-D Poisson’s
equation solver was implemented to calculate the potential distribution.
Then, the current was calculated using the transmission coefficient based
on either WKB or TMM methods. It was found that a moderate gate bias
change results in an appreciable change in the drain current.
The various key parameters were studied and it was found that they
influence satisfactorily the /- V characteristics, the transconductance and
the output impedance. Detailed DC and AC analysis were carried out to
support the design of the structures under consideration.